In computer systems, memory devices are used for storing programs and data. Almost all information of the computer systems, such as original data, programs, intermediate results and ultimate results, can be stored in the memory devices. Under control of a controller, the memory device can operate a write process or a read processes in a specific position. Memory devices which are used for storing information, are indispensible components of the computer systems.
In order to ensure normal operation of a memory, a testing process is required after the memory is manufactured. The testing process can be implemented by a direct test, an embedded CPU (Central Processing Unit), a MBIST (Memory Built In Self Test), or the like.
In the testing process, if the memory under test has been found having a problem, such as fails to implement a write operation or a read operation, or loses data, then a repairing process is needed.
Usually, when a memory is found having a problem, the repairing process is only implemented to a portion of the memory which has the problem, rather than the entire memory. Further, a memory may include a plurality of sectors, and a sector may include a number of bytes. For example, the memory may include hundreds or thousands of sectors, and each of sectors may include 256, 512 or 1024 bytes. Accordingly, the repairing process may be implemented to one sector of the memory. Therefore, when a byte of a sector fails the testing process, then the repairing process is only implemented to the sector rather than the entire memory.
In existing testing processes, when one sector of a memory is taken as a repairing unit, the testing is implemented in an order of one sector by another. Furthermore, during testing the sector, all bytes of the sector are tested successively.
However, when one byte of a sector fails the testing, it can be obtained that the sector where the byte located should be repaired. Then, other bytes of the sector are not necessarily to be tested any more.
Memory test may include more testing items. Specifically, except standard write and read function, more special stress testing modes which screen potential reliability defect are included. So, the testing flow is longer. Furthermore, in existing testing methods including redundancy functions, even if one sector fails at the first testing item, for other testing items, the failed sector still will be tested each time. So, lots of testing time is wasted on the original failed sector. The testing efficiency is lower.
Accordingly, exiting testing processes are redundant, thus testing efficiency are lower. Therefore, a memory testing method which can avoid redundant processes and has higher efficiency is required.